Compared to its 7nm counterparts, the new nanosheet technology uses 75% lower energy

IBM Research 2 nm Wafer

IBM unveils the new 2nm node chip fabricated at its Albany facility. (Credit: IBM)

IBM has introduced what it claims to be the world’s first 2-nanometer node chip (2nm node chip), which can deliver 45% faster computing compared to the most advanced 7nm node chips in use.

The company claimed that its new nanosheet technology uses 75% lower energy compared to its 7nm counterparts.

According to IBM, the new chip technology is capable of addressing the growing demand for increased chip performance and energy efficiency, particularly in the era of artificial intelligence, hybrid cloud, and the Internet of Things.

The tech giant said that the advanced 2nm chips can increase the cell phone battery life by four times. This means users have to charge their devices only once in four days.

The new chip technology is expected to bring down the carbon footprint of data centres, said the company.

For laptops, the advanced 2nm chips can drastically speed up operations. The chips will help in faster processing in applications, can make language translation easier, and also enable access to faster internet.

Furthermore, the new chip technology will help self-driving cars and other autonomous vehicles boost their capability in object detection and reaction time.

IBM Research SVP and director Darío Gil said: “The IBM innovation reflected in this new 2 nm chip is essential to the entire semiconductor and IT industry.

“It is the product of IBM’s approach of taking on hard tech challenges and a demonstration of how breakthroughs can result from sustained investments and a collaborative R&D ecosystem approach.”

IBM said that the 2nm chip design validates the advanced scaling of semiconductors using its nanosheet technology. The new chip technology will enable the 2nm chip to fit up to 50 billion transistors on a chip that is as small as a fingernail.

The company added that more transistors on a chip give increased options to processor designers for infusing core-level innovations to boost capabilities for AI, cloud computing, and other leading edge workloads, along with new pathways for hardware-enforced security and encryption.